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-rw-r--r--boot/disk_load_16.asm8
-rw-r--r--boot/mbr.asm27
-rw-r--r--boot/pm.asm1
-rw-r--r--boot/vesa_setup_16.asm7
-rw-r--r--kernel/console.c6
-rw-r--r--kernel/kernel.c64
-rw-r--r--kernel/vesa.c12
-rw-r--r--kernel/vmem.c55
-rw-r--r--kernel/x86.c64
-rw-r--r--kernel/x86.h2
10 files changed, 176 insertions, 70 deletions
diff --git a/boot/disk_load_16.asm b/boot/disk_load_16.asm
index 4222dd9..e45b89a 100644
--- a/boot/disk_load_16.asm
+++ b/boot/disk_load_16.asm
@@ -7,8 +7,8 @@
[bits 16]
-DISK_LOAD_HANG_MSG:
- db " D",0
+DISK_LOAD:
+ db "D",0
;disk_load routune (load dh sectors from drive dl to es:bx)
;lba mode has 52 sectors hardcoded!
@@ -48,10 +48,8 @@ disk_load_lba:
lea si,[lba_adr]
int 0x13
jc skip_print
-
- mov bx, 0x1000
+ mov bx, DISK_LOAD
call print_string
-
skip_print:
popa
diff --git a/boot/mbr.asm b/boot/mbr.asm
index 4ece914..ca851c3 100644
--- a/boot/mbr.asm
+++ b/boot/mbr.asm
@@ -61,7 +61,7 @@ jmp $ ;entry for other processors ;)
BOOT_DRIVE:
db 0xff
STR_VERSION:
- db "v0.4",0
+ db "v0.5",0
VESA_CHECK1:
db "1",0
VESA_CHECK2:
@@ -145,17 +145,30 @@ boot_32_pm:
; ;http://www.brokenthorn.com/Resources/OSDev9.html
; ;Method 3.1: Enables A20 through keyboard controller
; ;Not all keyboard controllers support this
-; ;todo: check if this has any effect at all !?!?
- mov al, 0xdd ; command 0xdd: enable a20
-; ;mov al, 0xdf ; command 0xdf: disable a20
- out 0x64, al ; send command to controller
+; ; does not work in virtual box (with VT-x accerleration?)
- mov eax,0
-;
+; mov al, 0xdd ; command 0xdd: enable a20
+; mov al, 0xdf ; command 0xdf: disable a20
+; out 0x64, al ; send command to controller
+
+ ;Fast A20 Gate:
+ ;http://wiki.osdev.org/A20_Line
+
+ in al, 0x92
+ or al, 2
+ out 0x92, al
+
+ ; call kernel!
+ mov eax,0 ;booting processor
call KERNEL_OFFSET ;jump into our Kernel!
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
+
+;fill partition table (4x16byte) with zeroes.
+;(otherwise my Acer Aspire will not boot)
+times 64 db 0x0
+
;so we get identified as MBR
times 510-($-$$) db 0x0
;dw 0x0
diff --git a/boot/pm.asm b/boot/pm.asm
index 8a4f745..73bb9d3 100644
--- a/boot/pm.asm
+++ b/boot/pm.asm
@@ -11,6 +11,7 @@ switch_to_pm:
cli ;switch off interrupts!
lgdt [gdt_descriptor] ;load descriptor table!
+ lldt [gdt_descriptor] ;load descriptor table! (local)
;switch on 32-bit protected mode
mov eax, cr0
diff --git a/boot/vesa_setup_16.asm b/boot/vesa_setup_16.asm
index 7180252..96e16e2 100644
--- a/boot/vesa_setup_16.asm
+++ b/boot/vesa_setup_16.asm
@@ -33,16 +33,15 @@ VesaSetup:
jmp vesa_err2
vesa_ok2:
-
;VESA: finally switch to the mode of choice!
mov ax,0x4f02 ;vesa function: Set Mode
mov bx,VESA_MODE_SELECT
int 0x10
- vesa_err3:
- mov bx, VESA_CHECK3
- call print_string
cmp ax,0x004f
je vesa_ok3
+ vesa_err3
+ mov bx, VESA_CHECK3
+ call print_string
jmp vesa_err3
vesa_ok3:
popa
diff --git a/kernel/console.c b/kernel/console.c
index 72ad066..16cf04f 100644
--- a/kernel/console.c
+++ b/kernel/console.c
@@ -1,6 +1,6 @@
#include "console.h"
-//#define FOOLOS_CONSOLE
+#define FOOLOS_CONSOLE
//#undef FOOLOS_CONSOLE
static int posx=0;
@@ -10,11 +10,11 @@ static int posy=0;
void print_char_col(int x, int y, char c, char col)
{
-#ifdef FOOLOS_CONSOLE
+//#ifdef FOOLOS_CONSOLE
char* video_mem=(char *)SCR_VIDEOMEM+(x+y*SCR_REAL_WIDTH)*2;
video_mem[0]=c;
video_mem[1]=col;
-#endif
+//#endif
}
void print_char(int x, int y, char c)
diff --git a/kernel/kernel.c b/kernel/kernel.c
index 7bbfcce..429a286 100644
--- a/kernel/kernel.c
+++ b/kernel/kernel.c
@@ -25,22 +25,17 @@ void kernel_main(uint32_t initial_stack, int mp)
{
+ volatile static uint32_t cpu1_counter=0;
+
// catch the APs (Application Processors)
+ /*
if(mp==1)
{
- uint16_t c3=0;
- while(1)
- {
-
-
- c3++;
- asm("cli");
-
- PutString("cpu2: %03d", 200,560,0b1111100000000000, c3/100);
-
- asm("sti");
- }
+ //while(1) { static uint16_t c=0; PutString("cpu2: %03d", 200,560,0b1111100000000000, (c++)/100); }
+ while(1) { static uint16_t c=0; PutString("cpu1counter: %d", 200,560,0b1111100000000000, (cpu1_counter)); }
}
+ */
+
//
// We want to get output to the screen as fast as possible!
@@ -62,7 +57,6 @@ void kernel_main(uint32_t initial_stack, int mp)
// our video memory
//
-
uint32_t vesa_physbase=vesa_init(0x8300,0x8400,0x7200);
@@ -72,8 +66,6 @@ void kernel_main(uint32_t initial_stack, int mp)
log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"initial esp: 0x%08X",initial_stack);
- log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"mp: %d",mp);
-
//
// Initialize other processors
//
@@ -81,10 +73,26 @@ void kernel_main(uint32_t initial_stack, int mp)
// Should support APCI in future too.
//
+
if(!init_mp()) panic(FOOLOS_MODULE_NAME,"Can not Find _MP_");
//
+ // Memory Init
+ //
+
+ // we know that here, the bootloader placed the mamory map!
+ mem_init(0x7c00+0x400,*((uint16_t *)(0x7c00+0x600)));
+
+
+ // paging (pass the vesa physbase address for identity mapping)
+ vmem_init(vesa_physbase);
+
+ while(1) {
+ PutString("cpu1counter: %d", 10,560,0b1111100000000000, (cpu1_counter));
+ cpu1_counter++;
+ }
+ //
// Setup PIC
//
// Do we nee this when using APIC?
@@ -103,17 +111,6 @@ void kernel_main(uint32_t initial_stack, int mp)
//
- // Memory Init
- //
-
- // we know that here, the bootloader placed the mamory map!
- mem_init(0x7c00+0x400,*((uint16_t *)(0x7c00+0x600)));
-
- // paging (pass the vesa physbase address for identity mapping)
- vmem_init(vesa_physbase);
-
-
- //
// Interrupts
//
@@ -136,8 +133,19 @@ void kernel_main(uint32_t initial_stack, int mp)
int_install_ir(38, 0b10001110, 0x08,&int_floppy_handler);
// now we can enable interrupts back again
- int_enable();
-
+// int_enable();
+
+ while(1) {
+ cpu1_counter++;
+ /*
+ static uint16_t c=0;
+ PutString("cpu1: A",20,560,0xffffff,0);
+ for(int c2=0;c2<0xffff;c2++);
+ PutString("cpu1: B",20,560,0xffffff,0);
+ for(int c2=0;c2<0xffff;c2++);
+ //PutString("cpu1: %03d", 20,560,0b1111100000000000, (c++)/100);
+ */
+ }
//
// Scan the PCI Bus
diff --git a/kernel/vesa.c b/kernel/vesa.c
index b7b4615..a3fc76c 100644
--- a/kernel/vesa.c
+++ b/kernel/vesa.c
@@ -57,6 +57,12 @@ static console_y;
static console_lines;
static console_cols;
+void vesa_set_physbase(uint32_t addr)
+{
+ VbeModeInfoBlock->physbase=addr;
+}
+
+
uint32_t vesa_init(vbeinfo *info,vbemodeinfo *mode,foolfont *rawfont)
{
//the only functionallu important init lines! (rest is log)
@@ -180,12 +186,12 @@ void PutConsoleNL()
{
console_x=0;
console_y++;
- if(console_y>console_lines)console_y=1;
+ if(console_y>=console_lines)console_y=0;
+
for(int i=0;i<console_cols;i++)
{
- PutFont(' ',i*10,(console_y+1)*12,0);
+ PutFont(' ',i*10,(console_y)*12,0);
}
-
}
diff --git a/kernel/vmem.c b/kernel/vmem.c
index 8590579..741a1e8 100644
--- a/kernel/vmem.c
+++ b/kernel/vmem.c
@@ -7,7 +7,8 @@
// TODO : why is the frame not 0xfffff??
-enum PAGE_PTE_FLAGS {
+enum PAGE_PTE_FLAGS
+{
I86_PTE_PRESENT = 1, //0000000000000000000000000000001
I86_PTE_WRITABLE = 2, //0000000000000000000000000000010
@@ -22,7 +23,8 @@ enum PAGE_PTE_FLAGS {
I86_PTE_FRAME = 0xFFFFF000 //1111111111111111111000000000000
};
-enum PAGE_PDE_FLAGS {
+enum PAGE_PDE_FLAGS
+{
I86_PDE_PRESENT = 1, //0000000000000000000000000000001
I86_PDE_WRITABLE = 2, //0000000000000000000000000000010
@@ -194,6 +196,17 @@ void vmmngr_map_page (void* phys, void* virt)
}
+void show_cr()
+{
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"cr0: 0x%08x",x86_get_cr0());
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"cr1: 0x%08x",x86_get_cr1());
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"cr2: 0x%08x",x86_get_cr2());
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"cr3: 0x%08x",x86_get_cr3());
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"cr4: 0x%08x",x86_get_cr4());
+
+}
+
void vmem_init(uint32_t vesa_physbase)
{
log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"init paging (vesa base: 0x%08x)",vesa_physbase);
@@ -213,33 +226,38 @@ void vmem_init(uint32_t vesa_physbase)
if (!dir)panic(FOOLOS_MODULE_NAME,"unable to alloc pdirectory");
log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"pdirectory: 0x%X",dir);
- //! map 1mb to 3gb (where we are at)
- for (int i=0, frame=vesa_physbase, virt=vesa_physbase; i<1024; i++, frame+=4096, virt+=4096) {
-
+ //! 1st 4mb are idenitity mapped
+ for (int i=0, frame=0x0, virt=0x00000000; i<1024; i++, frame+=4096, virt+=4096)
+ {
//! create a new page
pt_entry page=0;
pt_entry_add_attrib (&page, I86_PTE_PRESENT);
pt_entry_set_frame (&page, frame);
//! ...and add it to the page table
- table1->m_entries [PAGE_TABLE_INDEX (virt) ] = page;
+ table2->m_entries [PAGE_TABLE_INDEX (virt) ] = page;
}
- //! 1st 4mb are idenitity mapped
- for (int i=0, frame=0x0, virt=0x00000000; i<1024; i++, frame+=4096, virt+=4096)
+ //! map 1mb to 3gb (where we are at)
+
+ uint32_t vesa_mapped=0x1000*1024;
+
+ for (int i=0, frame=vesa_physbase, virt=vesa_mapped; i<1024; i++, frame+=4096, virt+=4096)
{
//! create a new page
pt_entry page=0;
pt_entry_add_attrib (&page, I86_PTE_PRESENT);
+// pt_entry_add_attrib (&page, I86_PTE_WRITABLE);
pt_entry_set_frame (&page, frame);
//! ...and add it to the page table
- table2->m_entries [PAGE_TABLE_INDEX (virt) ] = page;
+ table1->m_entries [PAGE_TABLE_INDEX (virt) ] = page;
}
+ for(int i=0;i<1024;i++)dir->m_entries [i]=0;
- pd_entry* entry = &dir->m_entries [PAGE_DIRECTORY_INDEX (vesa_physbase) ];
+ pd_entry* entry = &dir->m_entries [PAGE_DIRECTORY_INDEX (vesa_mapped) ];
*entry=0;
pd_entry_add_attrib (entry, I86_PDE_PRESENT);
pd_entry_add_attrib (entry, I86_PDE_WRITABLE);
@@ -252,16 +270,23 @@ void vmem_init(uint32_t vesa_physbase)
pd_entry_add_attrib (entry2, I86_PDE_WRITABLE);
pd_entry_set_frame (entry2, (physical_addr)table2);
-
-
-
x86_set_pdbr(dir);
log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"enabling paging...");
+
+ show_cr();
+
+ // while(1);
+
+ x86_paging_enable();
+ x86_paging_disable();
x86_paging_enable();
+ vesa_set_physbase(vesa_mapped);
+
+ // x86_flush_tlb(0);
+ // x86_flush_tlb(vesa_physbase);
- x86_flush_tlb(0);
- x86_flush_tlb(vesa_physbase);
+ show_cr();
}
diff --git a/kernel/x86.c b/kernel/x86.c
index 94f4f89..c1113bf 100644
--- a/kernel/x86.c
+++ b/kernel/x86.c
@@ -1,5 +1,45 @@
#include "x86.h"
+// get control registers (cr0-cr4)
+
+uint32_t x86_get_cr0()
+{
+ uint32_t cr;
+ asm volatile("mov %%cr0, %0": "=b"(cr));
+ return cr;
+}
+
+uint32_t x86_get_cr1()
+{
+ uint32_t cr=0;
+
+ // reading the reserved cr1 register results in crash.
+ // (at least on emulators)
+ // asm volatile("mov %%cr1, %0": "=b"(cr));
+
+ return cr;
+}
+
+uint32_t x86_get_cr2()
+{
+ uint32_t cr;
+ asm volatile("mov %%cr2, %0": "=b"(cr));
+ return cr;
+}
+
+uint32_t x86_get_cr3()
+{
+ uint32_t cr=0;
+ asm volatile("mov %%cr3, %0": "=b"(cr));
+ return cr;
+}
+
+uint32_t x86_get_cr4()
+{
+ uint32_t cr;
+ asm volatile("mov %%cr4, %0": "=b"(cr));
+ return cr;
+}
void x86_outb(int port, uint8_t data)
{
__asm __volatile("outb %0,%w1" : : "a" (data), "d" (port));
@@ -43,15 +83,31 @@ void x86_set_pdbr(uint32_t addr)
}
+// enable PT bit in CR0
void x86_paging_enable()
{
- unsigned int cr0;
- asm volatile("mov %%cr0, %0": "=b"(cr0));
- cr0 |= 0x80000000;
+ uint32_t cr0=x86_get_cr0();
+ cr0 |= 0x80000000; // enable paging
+
+// cr0 |= 0x40000000; // cahce disable
+// cr0 |= 0x20000000; // not-write-through
+// cr0 |= 0x10000; // write to read-only pages
+
+ asm volatile("mov %0, %%cr0":: "b"(cr0));
+}
+
+
+// disable PT bit in CR0
+void x86_paging_disable()
+{
+ uint32_t cr0=x86_get_cr0();
+ cr0 &= ~0x80000000;
asm volatile("mov %0, %%cr0":: "b"(cr0));
}
-x86_flush_tlb(uint32_t addr)
+void x86_flush_tlb(uint32_t addr)
{
asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
}
+
+
diff --git a/kernel/x86.h b/kernel/x86.h
index 434c28c..345162f 100644
--- a/kernel/x86.h
+++ b/kernel/x86.h
@@ -18,6 +18,6 @@ void x86_outl(int port, uint32_t data);
uint32_t x86_inl(int port);
void x86_set_pdbr(uint32_t addr);
void x86_paging_enable();
-void x86_flush_tlb(void* m);
+void x86_flush_tlb(uint32_t addr);
#endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-09 06:26:36 +0000