From 4cda542d863839c5b0e026ccee297ca5ff3dd9cd Mon Sep 17 00:00:00 2001 From: Miguel Date: Sun, 9 Sep 2018 17:28:59 +0200 Subject: switched to apic/ioapic finally --- kernel/smp.c | 37 +++++++++---------------------------- 1 file changed, 9 insertions(+), 28 deletions(-) (limited to 'kernel/smp.c') diff --git a/kernel/smp.c b/kernel/smp.c index 08fe71b..9434a47 100644 --- a/kernel/smp.c +++ b/kernel/smp.c @@ -1,12 +1,7 @@ #include "kernel.h" -// http://www.intel.com/content/dam/doc/specification-update/64-architecture-x2apic-specification.pdf -// http://download.intel.com/design/chipsets/datashts/29056601.pdf -// http://www.scs.stanford.edu/05au-cs240c/lab/ia32/IA32-3.pdf -// https://wiki.osdev.org/Symmetric_Multiprocessing -// https://wiki.osdev.org/APIC_timer +#include "smp.h" #include -#include "smp.h" #include "gdt.h" #include "mem.h" #include "interrupts.h" @@ -14,7 +9,7 @@ #include "spinlock.h" #include "asm_x86.h" #include "asm_pit.h" -#include "asm_mp.h" +#include "asm_smp.h" #define APIC_APICID 0x20 #define APIC_APICVER 0x30 @@ -42,7 +37,7 @@ #define TMR_PERIODIC 0x20000 #define TMR_BASEDIV (1<<20) -// some multiprocessor shit that should move away TODO +// uint32_t c1,c2,c3; volatile uint8_t proc; uint32_t cpu_counter[SMP_MAX_PROC]; @@ -106,7 +101,6 @@ void apicIPI(uint8_t dest, uint8_t number) void apicEnable() { writeAPIC(APIC_SPURIOUS,readAPIC(APIC_SPURIOUS)|0x100); - } /** select mode : divisor. @@ -138,6 +132,7 @@ uint32_t probeBusSpeed(uint32_t sel) klog("%d MHz (%d Hz) bus speed (ticks=%d)",ticksInS/(1000000/divisor),ticksInS*divisor,ticksInS/20); return ticksInS*divisor; } + void smp_main() { // setup stack @@ -147,7 +142,6 @@ void smp_main() asm volatile("jmp kernel_ap"); } - void kernel_ap() { klog("smp local apic id: 0x%08X",apicID()); @@ -186,25 +180,10 @@ void kernel_ap() */ } - -void kernel_ap_old() -{ - proc++; - uint8_t p=proc; - while(1) - { - cpu_counter[p]++; - - //lock_spin(0); - if(cpu_counter[p]%1000000==0)klog("cpu[%d] %d",p,cpu_counter[p]); - //lock_release(0); - - } -} - // this will start all our application processors! -void smp_start_aps(smp_processors *pros) +void smp_start_aps(acpi_information *pros) { + fixme("how to support IPI addressing more than 16cpus?"); // TODO: check if local APIC is present via CPUID (P6 (i686) and above) local_apic_addr=pros->local_apic_address; io_apic_addr=pros->io_apic_address; @@ -216,16 +195,18 @@ void smp_start_aps(smp_processors *pros) uint32_t speed=probeBusSpeed(4); // get bus speed (divisor: 16) // setup apic timer - countdown=speed/16; // tick once a second + countdown=speed/16/10; // tick 10 times a second writeAPIC(APIC_TMRDIV, 0x3); // divisor 16 writeAPIC(APIC_LVT_TMR, INTERRUPT_APIC_TIMER | TMR_PERIODIC); // on interrupt 200 writeAPIC(APIC_TMRINITCNT, countdown); + countdown*=10; // setup IO APIC // PIT irq 00 -> 02 flags 0 -> 0x90 // kb irq 01 -> 01 flags ? -> 0x91 // mouse irq 12 -> 12 flags ? -> 0x92 + fixme("use acpi info to setup IOAPIC"); irqIOAPIC(2,0x90,0x0); irqIOAPIC(1,0x91,0x0); irqIOAPIC(12,0x92,0x0); -- cgit v1.2.3