#include "x86.h"

//TODO!!!
void sleep(int i)
{
    i*=1000000;
    for(;i>0;i--)
    {
	
    }
}
// disable interrupts
void x86_int_disable()
{
    __asm__("cli");
}

// enable interrupts
void x86_int_enable()
{
    __asm__("sti");
}

// get control registers (cr0-cr4)

uint32_t x86_get_cr0()
{
    uint32_t cr;
    asm volatile("mov %%cr0, %0": "=b"(cr));
    return cr;
}

uint32_t x86_get_cr1()
{
    uint32_t cr=0;
    
    // reading the reserved cr1 register results in crash.
    // (at least on emulators)
    // asm volatile("mov %%cr1, %0": "=b"(cr));
    
    return cr;
}

uint32_t x86_get_cr2()
{
    uint32_t cr;
    asm volatile("mov %%cr2, %0": "=b"(cr));
    return cr;
}

uint32_t x86_get_cr3()
{
    uint32_t cr=0;
    asm volatile("mov %%cr3, %0": "=b"(cr));
    return cr;
}

uint32_t x86_get_cr4()
{
    uint32_t cr;
    asm volatile("mov %%cr4, %0": "=b"(cr));
    return cr;
}
void x86_outb(int port, uint8_t data)
{
    __asm __volatile("outb %0,%w1" : : "a" (data), "d" (port));
}

uint8_t x86_inb(int port)
{
    uint8_t data;
    __asm __volatile("inb %w1,%0" : "=a" (data) : "d" (port));
    return data;
}

void x86_outw(int port, uint16_t data)
{
    __asm __volatile("outw %0,%w1" : : "a" (data), "d" (port));
}

uint16_t x86_inw(int port)
{
    uint16_t data;
    __asm __volatile("inw %w1,%0" : "=a" (data) : "d" (port));
    return data;
}

void x86_outl(int port, uint32_t data)
{
    __asm __volatile("outl %0,%w1" : : "a" (data), "d" (port));
}

uint32_t x86_inl(int port)
{
    uint32_t data;
    __asm __volatile("inl %w1,%0" : "=a" (data) : "d" (port));
    return data;
}


void x86_set_pdbr(uint32_t addr) 
{
    asm volatile("mov %0, %%cr3":: "b"(addr));

}

// enable PT bit in CR0
void x86_paging_enable()
{
    uint32_t cr0=x86_get_cr0();
    cr0 |= 0x80000000; // enable paging 
    asm volatile("mov %0, %%cr0":: "b"(cr0));
}


// disable PT bit in CR0
void x86_paging_disable()
{
    uint32_t cr0=x86_get_cr0();
    cr0 &= ~0x80000000;
    asm volatile("mov %0, %%cr0":: "b"(cr0));
}

void x86_flush_tlb(uint32_t addr)
{
    asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
}