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authorMiguel <m.i@gmx.at>2018-09-03 15:18:16 +0200
committerMiguel <m.i@gmx.at>2018-09-03 15:18:16 +0200
commit7eb87bf3f3fa6226657a7106eb255cbfa97758d2 (patch)
tree2d7d2280d32180d18796999bf7687ebe5bf208df /asm/pic.asm
parent76b3da6022310dd8edbbbfdf4f73f1696a559853 (diff)
big renaming
Diffstat (limited to 'asm/pic.asm')
-rw-r--r--asm/pic.asm84
1 files changed, 0 insertions, 84 deletions
diff --git a/asm/pic.asm b/asm/pic.asm
deleted file mode 100644
index 901f854..0000000
--- a/asm/pic.asm
+++ /dev/null
@@ -1,84 +0,0 @@
-;************************************************************************
-; Map the 8259A PIC to use interrupts 32-47 within our interrupt table
-;************************************************************************
-
-[bits 32]
-
-global asm_pic_setup
-
-%define ICW_1 0x11 ; 00010001 binary. Enables initialization mode and we are sending ICW 4
-
-%define PIC_1_CTRL 0x20 ; Primary PIC control register
-%define PIC_2_CTRL 0xA0 ; Secondary PIC control register
-
-%define PIC_1_DATA 0x21 ; Primary PIC data register
-%define PIC_2_DATA 0xA1 ; Secondary PIC data register
-
-%define IRQ_0 0x20 ; IRQs 0-7 mapped to use interrupts 0x20-0x27
-%define IRQ_8 0x28 ; IRQs 8-15 mapped to use interrupts 0x28-0x36
-
-asm_pic_setup:
-
-; Send ICW 1 - Begin initialization -------------------------
-
- ; Setup to initialize the primary PIC. Send ICW 1
-
- mov al, ICW_1
- out PIC_1_CTRL, al
-
-; Send ICW 2 - Map IRQ base interrupt numbers ---------------
-
- ; Remember that we have 2 PICs. Because we are cascading with this second PIC, send ICW 1 to second PIC command register
-
- out PIC_2_CTRL, al
-
- ; send ICW 2 to primary PIC
-
- mov al, IRQ_0
- out PIC_1_DATA, al
-
- ; send ICW 2 to secondary controller
-
- mov al, IRQ_8
- out PIC_2_DATA, al
-
-; Send ICW 3 - Set the IR line to connect both PICs ---------
-
- ; Send ICW 3 to primary PIC
-
- mov al, 0x4 ; 0x04 => 0100, second bit (IR line 2)
- out PIC_1_DATA, al ; write to data register of primary PIC
-
- ; Send ICW 3 to secondary PIC
-
- mov al, 0x2 ; 010=> IR line 2
- out PIC_2_DATA, al ; write to data register of secondary PIC
-
-; Send ICW 4 - Set x86 mode --------------------------------
-
- mov al, 1 ; bit 0 enables 80x86 mode
-
- ; send ICW 4 to both primary and secondary PICs
-
- out PIC_1_DATA, al
- out PIC_2_DATA, al
-
-; All done. Null out the data registers
-
- mov al, 0
- out PIC_1_DATA, al
- out PIC_2_DATA, al
-
- ;mask
-in al, 0x21 ; read in the primary PIC Interrupt Mask Register (IMR)
-and al, 0x00 ; 0xEF => 11101111b. This sets the IRQ4 bit (Bit 5) in AL
-out 0x21, al ; write the value back into IMR
-
-
-in al, 0xA1 ; read in the primary PIC Interrupt Mask Register (IMR)
-and al, 0x00 ; 0xEF => 11101111b. This sets the IRQ4 bit (Bit 5) in AL
-out 0xA1, al ; write the value back into IMR
-
-ret
-
-;;;;;;;;;;;;;;;;;;;;