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authorMichal Idziorek <m.i@gmx.at>2014-08-31 15:04:44 +0200
committerMichal Idziorek <m.i@gmx.at>2014-08-31 15:04:44 +0200
commit3fa203061bdae80c75c5f08afa1a607b1c62c075 (patch)
tree6bd278bc41d741531ce61438bca5d2b180c4ab64 /boot/pic.asm
parentcd7312578948b7aee6bba8e91fbbc84b06f2f586 (diff)
updated boot loader supports for LBA mode
Now booting from usb stick on my Acer Aspire works fine too :)
Diffstat (limited to 'boot/pic.asm')
-rw-r--r--boot/pic.asm80
1 files changed, 0 insertions, 80 deletions
diff --git a/boot/pic.asm b/boot/pic.asm
deleted file mode 100644
index 5724af6..0000000
--- a/boot/pic.asm
+++ /dev/null
@@ -1,80 +0,0 @@
-;************************************************************************
-; Map the 8259A PIC to use interrupts 32-47 within our interrupt table
-;************************************************************************
-
-%define ICW_1 0x11 ; 00010001 binary. Enables initialization mode and we are sending ICW 4
-
-%define PIC_1_CTRL 0x20 ; Primary PIC control register
-%define PIC_2_CTRL 0xA0 ; Secondary PIC control register
-
-%define PIC_1_DATA 0x21 ; Primary PIC data register
-%define PIC_2_DATA 0xA1 ; Secondary PIC data register
-
-%define IRQ_0 0x20 ; IRQs 0-7 mapped to use interrupts 0x20-0x27
-%define IRQ_8 0x28 ; IRQs 8-15 mapped to use interrupts 0x28-0x36
-
-pic_setup:
-
-; Send ICW 1 - Begin initialization -------------------------
-
- ; Setup to initialize the primary PIC. Send ICW 1
-
- mov al, ICW_1
- out PIC_1_CTRL, al
-
-; Send ICW 2 - Map IRQ base interrupt numbers ---------------
-
- ; Remember that we have 2 PICs. Because we are cascading with this second PIC, send ICW 1 to second PIC command register
-
- out PIC_2_CTRL, al
-
- ; send ICW 2 to primary PIC
-
- mov al, IRQ_0
- out PIC_1_DATA, al
-
- ; send ICW 2 to secondary controller
-
- mov al, IRQ_8
- out PIC_2_DATA, al
-
-; Send ICW 3 - Set the IR line to connect both PICs ---------
-
- ; Send ICW 3 to primary PIC
-
- mov al, 0x4 ; 0x04 => 0100, second bit (IR line 2)
- out PIC_1_DATA, al ; write to data register of primary PIC
-
- ; Send ICW 3 to secondary PIC
-
- mov al, 0x2 ; 010=> IR line 2
- out PIC_2_DATA, al ; write to data register of secondary PIC
-
-; Send ICW 4 - Set x86 mode --------------------------------
-
- mov al, 1 ; bit 0 enables 80x86 mode
-
- ; send ICW 4 to both primary and secondary PICs
-
- out PIC_1_DATA, al
- out PIC_2_DATA, al
-
-; All done. Null out the data registers
-
- mov al, 0
- out PIC_1_DATA, al
- out PIC_2_DATA, al
-
- ;mask
-in al, 0x21 ; read in the primary PIC Interrupt Mask Register (IMR)
-and al, 0x00 ; 0xEF => 11101111b. This sets the IRQ4 bit (Bit 5) in AL
-out 0x21, al ; write the value back into IMR
-
-
-in al, 0xA1 ; read in the primary PIC Interrupt Mask Register (IMR)
-and al, 0x00 ; 0xEF => 11101111b. This sets the IRQ4 bit (Bit 5) in AL
-out 0xA1, al ; write the value back into IMR
-
-ret
-
-;;;;;;;;;;;;;;;;;;;;