diff options
| author | Michal Idziorek <m.i@gmx.at> | 2014-09-02 14:53:09 +0200 |
|---|---|---|
| committer | Michal Idziorek <m.i@gmx.at> | 2014-09-02 14:53:09 +0200 |
| commit | 5348a94a6e7a16a070c502c29db30a08253a99a3 (patch) | |
| tree | a60838ee9c4b7ac854084fe0eeb0e579a5afc33d /kernel/x86.c | |
| parent | 347ee926fd09d7fb45025f2c4e4a4eeab83459c9 (diff) | |
Debugging paging problem on VirtualBox (VT-x)
Diffstat (limited to 'kernel/x86.c')
| -rw-r--r-- | kernel/x86.c | 64 |
1 files changed, 60 insertions, 4 deletions
diff --git a/kernel/x86.c b/kernel/x86.c index 94f4f89..c1113bf 100644 --- a/kernel/x86.c +++ b/kernel/x86.c @@ -1,5 +1,45 @@ #include "x86.h" +// get control registers (cr0-cr4) + +uint32_t x86_get_cr0() +{ + uint32_t cr; + asm volatile("mov %%cr0, %0": "=b"(cr)); + return cr; +} + +uint32_t x86_get_cr1() +{ + uint32_t cr=0; + + // reading the reserved cr1 register results in crash. + // (at least on emulators) + // asm volatile("mov %%cr1, %0": "=b"(cr)); + + return cr; +} + +uint32_t x86_get_cr2() +{ + uint32_t cr; + asm volatile("mov %%cr2, %0": "=b"(cr)); + return cr; +} + +uint32_t x86_get_cr3() +{ + uint32_t cr=0; + asm volatile("mov %%cr3, %0": "=b"(cr)); + return cr; +} + +uint32_t x86_get_cr4() +{ + uint32_t cr; + asm volatile("mov %%cr4, %0": "=b"(cr)); + return cr; +} void x86_outb(int port, uint8_t data) { __asm __volatile("outb %0,%w1" : : "a" (data), "d" (port)); @@ -43,15 +83,31 @@ void x86_set_pdbr(uint32_t addr) } +// enable PT bit in CR0 void x86_paging_enable() { - unsigned int cr0; - asm volatile("mov %%cr0, %0": "=b"(cr0)); - cr0 |= 0x80000000; + uint32_t cr0=x86_get_cr0(); + cr0 |= 0x80000000; // enable paging + +// cr0 |= 0x40000000; // cahce disable +// cr0 |= 0x20000000; // not-write-through +// cr0 |= 0x10000; // write to read-only pages + + asm volatile("mov %0, %%cr0":: "b"(cr0)); +} + + +// disable PT bit in CR0 +void x86_paging_disable() +{ + uint32_t cr0=x86_get_cr0(); + cr0 &= ~0x80000000; asm volatile("mov %0, %%cr0":: "b"(cr0)); } -x86_flush_tlb(uint32_t addr) +void x86_flush_tlb(uint32_t addr) { asm volatile("invlpg (%0)" ::"r" (addr) : "memory"); } + + |
