diff options
Diffstat (limited to 'kernel/smp.c')
| -rw-r--r-- | kernel/smp.c | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/kernel/smp.c b/kernel/smp.c index aa1a878..3787ac1 100644 --- a/kernel/smp.c +++ b/kernel/smp.c @@ -4,6 +4,7 @@ #include <stdint.h> #include "gdt.h" #include "mem.h" +#include "vmem.h" #include "interrupts.h" #include "kmalloc.h" #include "spinlock.h" @@ -84,7 +85,7 @@ uint32_t readAPIC(uint32_t offset) uint32_t apicID() { - return readAPIC(APIC_APICID); + return readAPIC(APIC_APICID)>>24; } void apicEOI() @@ -149,7 +150,14 @@ void kernel_ap() interrupts_install(); gdt_init(); + + struct pdirectory_struct *dir=vmem_kernel_dir(); + x86_set_page_directory(dir); + x86_paging_enable(); + uint32_t *cpu_mem=0x8000000; //1024 pages from here on are mapped per cpu for testing! TODO: dynamic! + *cpu_mem=apicID(); + writeAPIC(APIC_TMRDIV, 0x3); writeAPIC(APIC_LVT_TMR,INTERRUPT_APIC_TIMER | TMR_PERIODIC); writeAPIC(APIC_TMRINITCNT, countdown); @@ -158,11 +166,7 @@ void kernel_ap() asm_smp_unlock(); - while(1) - { - asm("hlt"); - klog("tack: 0x%08X: 0x%08X",readAPIC(APIC_APICID), readAPIC(APIC_TMRCURRCNT)); - } + while(1)asm("hlt"); // switch_to_user_mode(); /* @@ -183,12 +187,16 @@ void kernel_ap() // this will start all our application processors! void smp_start_aps(acpi_information *pros) { + fixme("how to support IPI addressing more than 16cpus?"); fixme("check via cpuid if apic exist?"); local_apic_addr=pros->local_apic_address; io_apic_addr=pros->io_apic_address; - klog("bsp local apic id: 0x%08X",apicID()); + uint32_t *cpu_mem=0x8000000; //1024 pages from here on are mapped per cpu for testing! TODO: dynamic! + *cpu_mem=apicID(); + + klog("bsp local apic id: 0x%08X",*cpu_mem); apicEnable(); // bsp apic seems to be enabled anyway. @@ -196,10 +204,10 @@ void smp_start_aps(acpi_information *pros) // setup apic timer countdown=speed/16/10; // tick 10 times a second + countdown*=10; writeAPIC(APIC_TMRDIV, 0x3); // divisor 16 writeAPIC(APIC_LVT_TMR, INTERRUPT_APIC_TIMER | TMR_PERIODIC); // on interrupt 200 writeAPIC(APIC_TMRINITCNT, countdown); - countdown*=10; // setup IO APIC // PIT irq 00 -> 02 flags 0 -> 0x90 |