1 files changed, 91 insertions, 0 deletions
diff --git a/kernel/timer.c b/kernel/timer.c
new file mode 100644
index 0000000..1f97c92
--- /dev/null
+++ b/kernel/timer.c
@@ -0,0 +1,91 @@
+
+/// PIT /// Timer stuff
+
+/*
+ http://www.brokenthorn.com/Resources/OSDevPit.html
+
+ vcc/gnd - voltage/ground
+
+ D0-D7 - data lines		(data bus)
+ wr/rd - writing / reading	(system control bus) 
+ cs - ignore wr/rd or not	(address bus)
+ a0-a1				(address bus)
+
+ // the three 16bit down counters/timers/channels
+ clk	0-2 (in)
+ gate	0-2 (in)
+ out	0-2 (out)
+
+ //typical
+    out1 -> pic  interrupt on every tick (system timer)
+    out2 - was used for genearting dram memory refresh  (Do not use)
+    out3 -> pc speaker
+
+    gate pins : depend on mode of operation
+    we do have modes 0-5.
+    mode0: counts down to zero , triggers interrupt and waits 
+    mode1: 
+    mode2: rate generator (sys timer)
+    ....
+
+
+ */
+
+#include "kernel.h"
+
+static uint64_t timer64=0;
+static uint8_t timer8=0;
+
+// clock handler
+void int_clock_handler()
+{
+    __asm__("pusha");
+
+    
+    timer64++;
+    timer8++;
+
+    // show point once every 1 second
+    if(timer8==25)
+    {
+	scr_put_string(".");
+	timer8=0;
+    }
+
+
+    // todo also the other pic!// TODO
+    __asm__("mov $0x20, %al");
+    __asm__("out %al, $0x20");
+    //
+
+    __asm__("popa");
+    __asm__("leave");
+    __asm__("iret");
+    __asm__("popa");
+    __asm__("leave");
+    __asm__("iret");
+
+}
+
+void timer_init()
+{
+    // config out timer on channel 0 : mode 2 (sys timer)
+    // http://en.wikipedia.org/wiki/Intel_8253#Control_Word_Register
+    // http://www.brokenthorn.com/Resources/OSDevPit.html
+    // int0 will be triggered ~25 times a second.
+
+    __asm__("pusha");
+
+    __asm__("mov %0, %%dx"::"X" (1193180 / 25));
+
+    __asm__("mov $0b00110100, %al");
+    __asm__("out %al,$0x43");
+
+    __asm__("mov %dx,%ax");
+
+    __asm__("out %al, $0x40");
+    __asm__("xchg %ah,%al");
+    __asm__("out %al, $0x40");
+
+    __asm__("popa");
+}