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-rw-r--r--xxx/inactive/acpi.c171
-rw-r--r--xxx/inactive/acpi.h2
-rw-r--r--xxx/inactive/e1000.c4
-rw-r--r--xxx/inactive/e1000.h1
-rw-r--r--xxx/inactive/floppy.c575
-rw-r--r--xxx/inactive/floppy.h1
-rw-r--r--xxx/inactive/mouse.c175
-rw-r--r--xxx/inactive/mp.c179
-rw-r--r--xxx/inactive/mp.h2
-rw-r--r--xxx/inactive/pci.c133
-rw-r--r--xxx/inactive/smp.c101
-rw-r--r--xxx/inactive/smp.h20
12 files changed, 1364 insertions, 0 deletions
diff --git a/xxx/inactive/acpi.c b/xxx/inactive/acpi.c
new file mode 100644
index 0000000..b42f628
--- /dev/null
+++ b/xxx/inactive/acpi.c
@@ -0,0 +1,171 @@
+// Advanced Configuration and Power Interface
+// http://wiki.xomb.org/index.php?title=ACPI_Tables
+
+#define FOOLOS_MODULE_NAME "acpi"
+
+#include "lib/logger/log.h"
+#include "lib/int/stdint.h"
+#include "lib/bool/bool.h"
+#include "lib/string/string.h"
+#include "smp.h"
+
+
+typedef struct acpi_rsdt_struct
+{
+ char sig[4];
+ uint32_t length;
+ uint8_t revision;
+ uint8_t checksum;
+ char oemid[6];
+ char oemtabid[8];
+ uint32_t oemrevision;
+ uint32_t vendor;
+ uint32_t rev;
+}acpi_rsdt;
+
+typedef struct aspi_rsdp_struct
+{
+ char sig[8]; //signature
+ uint8_t checksum;
+ char oem[6];
+ uint8_t revision;
+
+ uint32_t ptr_rsdt;
+ uint32_t length;
+
+ uint64_t ptr_xsdt; //same info but with 64bit pointers (preferred)
+ uint8_t checksum_ext;
+ uint8_t reserved[3];
+
+}acpi_rsdp;
+
+typedef struct
+{
+ char sig[4];
+ uint32_t length;
+ uint8_t rev;
+ uint8_t checksum;
+ char oemid[6];
+ char oemtableid[8];
+ char oemrev[4];
+ char creatorid[4];
+ char creatorrev[4];
+ uint32_t apic_local;
+ uint32_t flags;
+
+}acpi_madt;
+
+uint8_t *apci_get_next_entry(uint8_t *addr,smp_processors *procdata)
+{
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"Examining MADT Entry at 0x%08X",addr);
+
+ if(*addr==0)
+ {
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"MADT Entry: LocalAPIC");
+ // usable
+ if(addr[4]&1)
+ {
+ if(procdata->processors>=SMP_MAX_PROC){
+
+ panic(FOOLOS_MODULE_NAME,"we do not support that many processors. recompile with higher SMP_MAX_PROC.");
+ }
+
+ procdata->local_apic_id[procdata->processors]=addr[3];
+ procdata->processors++;
+ }
+
+ }
+ else if(*addr==1)
+ {
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"MADT Entry: IO APIC");
+ }
+ else if(*addr==2)log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"MADT Entry: Interrupt Source Override");
+ else log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"MADT Entry: type:0x%X",*addr);
+
+ return addr+addr[1];
+}
+
+
+void acpi_check_madt(uint32_t *madt,smp_processors *procdata)
+{
+ acpi_madt *table=(acpi_madt *)*madt;
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"Looking for MADT Table at %08X.",table);
+ if(strcmp("APIC",table->sig,4))
+ {
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Found MADT Table at 0x%08X",table);
+ uint8_t *end=(uint8_t *)table;
+ end+=table->length;
+
+ uint8_t *entry=(uint8_t *)table;
+ entry+=sizeof(acpi_madt);
+
+ procdata->local_apic_address=table->apic_local;
+
+ while(entry<end)
+ {
+ entry=apci_get_next_entry(entry,procdata);
+ }
+
+
+ }
+}
+
+void acpi_read_rsdt(acpi_rsdt *rsdt,smp_processors *procdata)
+{
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Reading RSDT Table at 0x%08X",rsdt);
+
+ if(!strcmp("RSDT",rsdt->sig,4))
+ panic(FOOLOS_MODULE_NAME,"Signature MISMATCH!");
+
+ int entries=(rsdt->length-sizeof(acpi_rsdt))/4;
+ uint32_t *first=(uint32_t *)rsdt;
+ first+=sizeof(acpi_rsdt)/4;
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Entries: %d",entries);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Looking for MADT Table");
+ for(int i=0;i<entries;i++)
+ {
+
+ acpi_check_madt(first,procdata);
+ first++;
+ }
+
+}
+
+// search for the RSDB table in
+// 0x7ffff - 0x9ffff (max)
+// 0xe0000 - 0xfffff
+
+bool acpi_find(smp_processors *procdata)
+{
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Looking for RSDP Table");
+ char *search=(char *)0x9f000; //will be 16 bit aligned;
+ procdata->processors=0;
+ procdata->boot=0;
+
+ while(search<=(char *)0xfffff)
+ {
+ if(strcmp("RSD PTR ",search,8)) // notice trailing space in "RSD PTR "
+ {
+ uint8_t checksum=0;
+ for(int i=0;i<20;i++)
+ checksum+=search[i];
+
+ if(checksum==0)
+ {
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"RSDP Table found at 0x%08X",search);
+ acpi_rsdp *rsdp=(acpi_rsdp *)search;
+ acpi_read_rsdt(rsdp->ptr_rsdt,procdata);
+ return true;
+ }
+ }
+
+ search++;
+
+ if(search==0xa0000)search=0xe0000;
+
+ }
+ return false;
+}
diff --git a/xxx/inactive/acpi.h b/xxx/inactive/acpi.h
new file mode 100644
index 0000000..b7c7342
--- /dev/null
+++ b/xxx/inactive/acpi.h
@@ -0,0 +1,2 @@
+#include "smp.h"
+bool acpi_find(smp_processors *procdata);
diff --git a/xxx/inactive/e1000.c b/xxx/inactive/e1000.c
new file mode 100644
index 0000000..99194be
--- /dev/null
+++ b/xxx/inactive/e1000.c
@@ -0,0 +1,4 @@
+
+void init_e1000()
+{
+}
diff --git a/xxx/inactive/e1000.h b/xxx/inactive/e1000.h
new file mode 100644
index 0000000..5413fe1
--- /dev/null
+++ b/xxx/inactive/e1000.h
@@ -0,0 +1 @@
+void init_e1000();
diff --git a/xxx/inactive/floppy.c b/xxx/inactive/floppy.c
new file mode 100644
index 0000000..1dbe137
--- /dev/null
+++ b/xxx/inactive/floppy.c
@@ -0,0 +1,575 @@
+
+/*
+ * Fool OS Simple Floppy Driver.
+ *
+ * coded by M.idziorek <m.i@gmx.at> on 20th of august 2014 A.D
+ *
+ * tested in : bochs, qemu and virutalbox so far
+ *
+ * resources:
+ *
+ * * http://wiki.osdev.org/Floppy_Disk_Controller#DMA_Data_Transfers
+ * * http://forum.osdev.org/viewtopic.php?f=1&t=13538
+ * * http://www.brokenthorn.com/Resources/OSDev20.html
+ * * http://bochs.sourceforge.net/cgi-bin/lxr/source/iodev/floppy.cc
+ * * http://viralpatel.net/taj/tutorial/chs_translation.php
+ *
+ */
+
+#define FOOLOS_MODULE_NAME "floppy"
+#include "config.h"
+
+#ifdef FOOLOS_COMPILE_FLOPPY
+
+#include "lib/logger/log.h"
+
+#include "x86.h"
+
+#define FLPY_SECTORS_PER_TRACK 18
+
+void flpydsk_send_command (uint8_t cmd);
+void flpydsk_wait_irq ();
+void flpydsk_check_int (uint32_t* st0, uint32_t* cyl);
+
+static volatile int _CurrentDrive=0;
+static volatile uint8_t _FloppyDiskIRQ;
+
+// temporary dma hack
+//! initialize DMA to use phys addr 1k-64k
+void flpydsk_initialize_dma () {
+
+ x86_outb (0x0a,0x06); //mask dma channel 2
+
+ x86_outb (0xd8,0xff); //reset master flip-flop
+
+ //changed to 0x000 (Address)
+ x86_outb (0x04, 0x00); //low
+ x86_outb (0x04, 0x05); //high
+ x86_outb (0x81,0x00); //page reg
+
+ x86_outb (0xd8, 0xff); //reset master flip-flop
+
+ // x86_outb (0x05, 0xff); //count to 0x23ff (number of bytes in a 3.5" floppy disk track)
+// x86_outb (0x05, 0x23);
+// hey, lets do just ONE sector instead (0x200)
+ x86_outb (0x05, 0xff); //low
+ x86_outb (0x05, 0x01); //high
+
+ x86_outb (0x80, 0); //external page register = 0
+
+ x86_outb (0x0a, 0x02); //unmask dma channel 2
+ log("dma",FOOLOS_LOG_INFO,"initialized");
+}
+
+//! prepare the DMA for read transfer
+void flpydsk_dma_read () {
+ x86_outb (0x0a, 0x06); //mask dma channel 2
+
+ x86_outb (0x0b, 0x56); //single transfer, address increment, autoinit, read, channel 2
+
+ x86_outb (0x0a, 0x02); //unmask dma channel 2
+ log("dma",FOOLOS_LOG_INFO,"configured for reading");
+}
+
+//! prepare the DMA for write transfer
+void flpydsk_dma_write () {
+
+ x86_outb (0x0a, 0x06); //mask dma channel 2
+ x86_outb (0x0b, 0x5a); //single transfer, address increment, autoinit, write, channel 2
+ x86_outb (0x0a, 0x02); //unmask dma channel 2
+ log("dma",FOOLOS_LOG_INFO,"configured for writing");
+}
+//
+//
+
+enum FLPYDSK_IO {
+
+ FLPYDSK_DOR = 0x3f2,
+ FLPYDSK_MSR = 0x3f4,
+ FLPYDSK_FIFO = 0x3f5, //data register
+ FLPYDSK_CTRL = 0x3f7
+};
+
+enum FLPYDSK_DOR_MASK {
+
+ FLPYDSK_DOR_MASK_DRIVE0 = 0, //00000000 = here for completeness sake
+ FLPYDSK_DOR_MASK_DRIVE1 = 1, //00000001
+ FLPYDSK_DOR_MASK_DRIVE2 = 2, //00000010
+ FLPYDSK_DOR_MASK_DRIVE3 = 3, //00000011
+ FLPYDSK_DOR_MASK_RESET = 4, //00000100
+ FLPYDSK_DOR_MASK_DMA = 8, //00001000
+ FLPYDSK_DOR_MASK_DRIVE0_MOTOR = 16, //00010000
+ FLPYDSK_DOR_MASK_DRIVE1_MOTOR = 32, //00100000
+ FLPYDSK_DOR_MASK_DRIVE2_MOTOR = 64, //01000000
+ FLPYDSK_DOR_MASK_DRIVE3_MOTOR = 128 //10000000
+};
+
+enum FLPYDSK_MSR_MASK {
+
+ FLPYDSK_MSR_MASK_DRIVE1_POS_MODE = 1, //00000001
+ FLPYDSK_MSR_MASK_DRIVE2_POS_MODE = 2, //00000010
+ FLPYDSK_MSR_MASK_DRIVE3_POS_MODE = 4, //00000100
+ FLPYDSK_MSR_MASK_DRIVE4_POS_MODE = 8, //00001000
+ FLPYDSK_MSR_MASK_BUSY = 16, //00010000
+ FLPYDSK_MSR_MASK_DMA = 32, //00100000
+ FLPYDSK_MSR_MASK_DATAIO = 64, //01000000
+ FLPYDSK_MSR_MASK_DATAREG = 128 //10000000
+};
+
+enum FLPYDSK_CMD {
+
+ FDC_CMD_READ_TRACK = 2,
+ FDC_CMD_SPECIFY = 3,
+ FDC_CMD_CHECK_STAT = 4,
+ FDC_CMD_WRITE_SECT = 5,
+ FDC_CMD_READ_SECT = 6,
+ FDC_CMD_CALIBRATE = 7,
+ FDC_CMD_CHECK_INT = 8,
+ FDC_CMD_WRITE_DEL_S = 9,
+ FDC_CMD_READ_ID_S = 0xa,
+ FDC_CMD_READ_DEL_S = 0xc,
+ FDC_CMD_FORMAT_TRACK = 0xd,
+ FDC_CMD_SEEK = 0xf
+};
+
+enum FLPYDSK_CMD_EXT {
+
+ FDC_CMD_EXT_SKIP = 0x20, //00100000
+ FDC_CMD_EXT_DENSITY = 0x40, //01000000
+ FDC_CMD_EXT_MULTITRACK = 0x80 //10000000
+};
+
+enum FLPYDSK_GAP3_LENGTH {
+
+ FLPYDSK_GAP3_LENGTH_STD = 42,
+ FLPYDSK_GAP3_LENGTH_5_14= 32,
+ FLPYDSK_GAP3_LENGTH_3_5= 27
+};
+
+enum FLPYDSK_SECTOR_DTL {
+
+ FLPYDSK_SECTOR_DTL_128 = 0,
+ FLPYDSK_SECTOR_DTL_256 = 1,
+ FLPYDSK_SECTOR_DTL_512 = 2,
+ FLPYDSK_SECTOR_DTL_1024 = 4
+};
+
+void flpydsk_write_dor (uint8_t val ) {
+
+ //! write the digital output register
+ x86_outb (FLPYDSK_DOR, val);
+
+}
+
+void flpydsk_write_ccr (uint8_t val) {
+
+ //! write the configuation control
+ x86_outb (FLPYDSK_CTRL, val);
+}
+
+
+void flpydsk_motor_on()
+{
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"starting motor...");
+ //x86_outb (FLPYDSK_DOR, FLPYDSK_DOR_MASK_DRIVE0_MOTOR | FLPYDSK_DOR_MASK_RESET);
+ x86_outb (FLPYDSK_DOR, 0x1c);
+ sleep(10); // wait ~ 1/3 second
+}
+
+void flpydsk_motor_off()
+{
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"stopping motor...");
+ x86_outb (FLPYDSK_DOR, 0x0c);
+}
+
+int flpydsk_calibrate (uint32_t drive) {
+
+ uint32_t st0, cyl;
+
+ if (drive >= 4)
+ {
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"ERROR!");
+ return -2;
+ }
+
+ //! turn on the motor
+ flpydsk_motor_on();
+
+ int i;
+ for (i = 0; i < 10; i++) {
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"calibrating");
+ //! send command
+ flpydsk_send_command ( FDC_CMD_CALIBRATE );
+ flpydsk_send_command ( drive );
+ flpydsk_wait_irq ();
+ flpydsk_check_int ( &st0, &cyl);
+
+ //! did we fine cylinder 0? if so, we are done
+ if (!cyl) {
+ if(st0 & 0xC0) {
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"calibrating FAILED!");
+ }
+ // flpydsk_control_motor (false);
+ flpydsk_motor_off();
+ return 0;
+ }
+ }
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"calibrating FAILED!");
+
+// flpydsk_control_motor (false);
+ flpydsk_motor_off();
+ return -1;
+}
+
+
+
+void flpydsk_disable_controller () {
+
+ flpydsk_write_dor (0);
+}
+
+void flpydsk_enable_controller () {
+
+ flpydsk_write_dor ( FLPYDSK_DOR_MASK_RESET | FLPYDSK_DOR_MASK_DMA);
+}
+
+
+uint8_t flpydsk_read_status () {
+
+ //! just return main status register
+ return x86_inb (FLPYDSK_MSR);
+}
+
+uint8_t flpydsk_read_data () {
+
+ //! same as above function but returns data register for reading
+ int i;
+ for (i = 0; i < 500; i++ )
+ if ( flpydsk_read_status () & FLPYDSK_MSR_MASK_DATAREG )
+ return x86_inb (FLPYDSK_FIFO);
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"reading data FAILED!");
+}
+void flpydsk_send_command (uint8_t cmd) {
+
+ //! wait until data register is ready. We send commands to the data register
+ int i;
+ for (i = 0; i < 500; i++ )
+ if ( flpydsk_read_status () & FLPYDSK_MSR_MASK_DATAREG )
+ {
+ x86_outb(FLPYDSK_FIFO, cmd);
+ return;
+ }
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"writing data FAILED!");
+}
+
+void flpydsk_drive_data (uint32_t stepr, uint32_t loadt, uint32_t unloadt, int dma ) {
+
+ uint32_t data = 0;
+
+ flpydsk_send_command (FDC_CMD_SPECIFY);
+
+ data = ( (stepr & 0xf) << 4) | (unloadt & 0xf);
+ flpydsk_send_command (data);
+
+ data = (loadt) << 1 | dma;
+ flpydsk_send_command (data);
+}
+
+void flpydsk_reset()
+{
+ uint32_t st0, cyl;
+
+ //! reset the controller
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"reset controller");
+ flpydsk_disable_controller ();
+ flpydsk_enable_controller ();
+ flpydsk_wait_irq ();
+
+ //! send CHECK_INT/SENSE INTERRUPT command to all drives
+ int i;
+ for (i=0; i<4; i++)
+ flpydsk_check_int (&st0,&cyl);
+
+ //! transfer speed 500kb/s
+ flpydsk_write_ccr (0);
+
+ //! pass mechanical drive info. steprate=3ms, unload time=240ms, load time=16ms
+// flpydsk_drive_data (3,16,240,0);
+//
+
+ flpydsk_send_command (FDC_CMD_SPECIFY);
+ flpydsk_send_command (0xdf); /* steprate = 3ms, unload time = 240ms */
+ flpydsk_send_command (0x02); /* load time = 16ms, no-DMA = 0 */
+
+ //! calibrate the disk
+ flpydsk_calibrate ( _CurrentDrive );
+}
+
+void int_floppy_handler()
+{
+ X86_IRQ_BEGIN
+ _FloppyDiskIRQ=1;
+ X86_IRQ_END
+}
+
+void flpydsk_wait_irq()
+{
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_FINE,"waiting for irq6");
+
+ while (1)
+ {
+ sleep(2);
+ x86_int_disable();
+ if(_FloppyDiskIRQ==1)break;
+ x86_int_enable();
+
+ }
+ _FloppyDiskIRQ = 0;
+ x86_int_enable();
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_FINE,"irq6 received");
+}
+
+void flpydsk_check_int (uint32_t* st0, uint32_t* cyl) {
+
+ flpydsk_send_command (FDC_CMD_CHECK_INT);
+
+ *st0 = flpydsk_read_data ();
+ *cyl = flpydsk_read_data ();
+}
+
+void flpydsk_write_sector_imp (uint8_t head, uint8_t track, uint8_t sector) {
+
+ //sector=1;
+ //! set the DMA for read transfer
+ flpydsk_dma_write ();
+
+ //flpydsk_drive_data (13, 1, 0xf, 0);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"writing head/track/sector");
+
+ uint32_t st0, cyl;
+
+ //! write a sector
+ flpydsk_send_command (
+ FDC_CMD_WRITE_SECT | FDC_CMD_EXT_MULTITRACK |
+ FDC_CMD_EXT_DENSITY);
+ flpydsk_send_command ( head << 2 | _CurrentDrive );
+ flpydsk_send_command ( track);
+ flpydsk_send_command ( head); // first head should match with above!
+ flpydsk_send_command ( sector);
+ flpydsk_send_command ( FLPYDSK_SECTOR_DTL_512 );
+ //flpydsk_send_command ( 1 ); // number of tracks we want
+ flpydsk_send_command ( FLPY_SECTORS_PER_TRACK ); // number of tracks !
+
+ /*
+ flpydsk_send_command (
+ ( ( sector + 1 ) >= FLPY_SECTORS_PER_TRACK )
+ ? FLPY_SECTORS_PER_TRACK : sector + 1 );
+ */
+
+ flpydsk_send_command ( FLPYDSK_GAP3_LENGTH_3_5 );
+ flpydsk_send_command ( 0xff );
+
+ //! wait for irq
+ flpydsk_wait_irq ();
+
+ //! read status info
+ int j;
+ for (j=0; j<7; j++)
+ flpydsk_read_data ();
+
+ //! let FDC know we handled interrupt
+ flpydsk_check_int (&st0,&cyl);
+}
+void flpydsk_read_sector_imp (uint8_t head, uint8_t track, uint8_t sector) {
+
+ //sector=1;
+ //! set the DMA for read transfer
+ flpydsk_dma_read ();
+
+ //flpydsk_drive_data (13, 1, 0xf, 0);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"reading head/track/sector");
+
+ uint32_t st0, cyl;
+
+ //! read in a sector
+ flpydsk_send_command (
+ FDC_CMD_READ_SECT | FDC_CMD_EXT_MULTITRACK |
+ FDC_CMD_EXT_SKIP | FDC_CMD_EXT_DENSITY);
+ flpydsk_send_command ( head << 2 | _CurrentDrive );
+ flpydsk_send_command ( track);
+ flpydsk_send_command ( head);
+ flpydsk_send_command ( sector);
+ flpydsk_send_command ( FLPYDSK_SECTOR_DTL_512 );
+ //flpydsk_send_command ( 1 ); // number of tracks we want
+ flpydsk_send_command ( FLPY_SECTORS_PER_TRACK ); // number of tracks !
+
+ /*
+ flpydsk_send_command (
+ ( ( sector + 1 ) >= FLPY_SECTORS_PER_TRACK )
+ ? FLPY_SECTORS_PER_TRACK : sector + 1 );
+ */
+
+
+ flpydsk_send_command ( FLPYDSK_GAP3_LENGTH_3_5 );
+ flpydsk_send_command ( 0xff );
+
+ //! wait for irq
+ flpydsk_wait_irq ();
+
+ //! read status info
+ int j;
+ for (j=0; j<7; j++)
+ flpydsk_read_data ();
+
+ //! let FDC know we handled interrupt
+ flpydsk_check_int (&st0,&cyl);
+}
+
+int flpydsk_seek ( uint32_t cyl, uint32_t head )
+{
+ //cyl=1;
+ //head=1;
+
+ uint32_t st0, cyl0;
+
+ if (_CurrentDrive >= 4)
+ return -1;
+
+ int i;
+ for (i = 0; i < 10; i++ ) {
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"seeking cyl: %d, head: %d",cyl,head);
+
+ //! send the command
+ flpydsk_send_command (FDC_CMD_SEEK);
+ flpydsk_send_command ( (head << 2) | _CurrentDrive);
+ flpydsk_send_command (cyl);
+
+
+ //! wait for the results phase IRQ
+ flpydsk_wait_irq ();
+ flpydsk_check_int (&st0,&cyl0);
+
+ //! found the cylinder?
+ if ( cyl0 == cyl)
+ return 0;
+ }
+
+ return -1;
+}
+
+void flpydsk_lba_to_chs (int lba,int *head,int *track,int *sector) {
+
+ //cylinder
+ //
+// *track = lba % ( FLPY_SECTORS_PER_TRACK * 2 );
+ /// *head = ( lba % FLPY_SECTORS_PER_TRACK ) % 2;//* 2 ) ) / ( FLPY_SECTORS_PER_TRACK );
+ //*sector = (lba % FLPY_SECTORS_PER_TRACK) +1;
+
+ *head = ( lba % ( FLPY_SECTORS_PER_TRACK * 2 ) ) / ( FLPY_SECTORS_PER_TRACK );
+ *track = lba / ( FLPY_SECTORS_PER_TRACK * 2 );
+ *sector = lba % FLPY_SECTORS_PER_TRACK + 1;
+}
+
+
+uint8_t* flpydsk_read_sector (int sectorLBA) {
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"reading sector: %d",sectorLBA);
+
+
+ if (_CurrentDrive >= 4)
+ return 0;
+
+ //! convert LBA sector to CHS
+ int head=0, track=0, sector=1;
+ flpydsk_lba_to_chs (sectorLBA, &head, &track, &sector);
+
+
+ //! turn motor on and seek to track
+ // start motor
+ flpydsk_motor_on();
+
+ if (flpydsk_seek (track, head) != 0)
+ return 0;
+
+ //! read sector and turn motor off
+ flpydsk_read_sector_imp (head, track, sector);
+ // flpydsk_control_motor (false);
+ flpydsk_motor_off();
+
+
+ //! warning: this is a bit hackish
+ //return (uint8_t*) DMA_BUFFER;
+ return (uint8_t*) 0x0;
+}
+
+uint8_t* flpydsk_write_sector (int sectorLBA) {
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"writing sector: %d",sectorLBA);
+
+ if (_CurrentDrive >= 4)
+ return 0;
+
+ //! convert LBA sector to CHS
+ int head=0, track=0, sector=1;
+ flpydsk_lba_to_chs (sectorLBA, &head, &track, &sector);
+
+
+ //! turn motor on and seek to track
+ // start motor
+ flpydsk_motor_on();
+
+ if (flpydsk_seek (track, head) != 0)
+ return 0;
+
+ //! read sector and turn motor off
+ flpydsk_write_sector_imp (head, track, sector);
+ // flpydsk_control_motor (false);
+ flpydsk_motor_off();
+
+
+ //! warning: this is a bit hackish
+ //return (uint8_t*) DMA_BUFFER;
+ return (uint8_t*) 0x0;
+}
+
+void floppy_init()
+{
+ // init dma
+ flpydsk_initialize_dma ();
+
+ _CurrentDrive=0;
+ _FloppyDiskIRQ = 0;
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"driver init (wathchdog: 0x%08X)",&_FloppyDiskIRQ);
+
+
+ flpydsk_reset ();
+
+ char *dma=0x0500;
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"test reading");
+
+ flpydsk_read_sector(65);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"finished reading");
+
+ flpydsk_reset ();
+
+ flpydsk_read_sector(64);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"finished reading");
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"test read: %s",dma);
+
+ flpydsk_reset ();
+
+// log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"test write (sector: 100)");
+// flpydsk_write_sector(100);
+// log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"finished writing");
+
+
+}
+
+#endif
diff --git a/xxx/inactive/floppy.h b/xxx/inactive/floppy.h
new file mode 100644
index 0000000..c149a3a
--- /dev/null
+++ b/xxx/inactive/floppy.h
@@ -0,0 +1 @@
+void int_floppy_handler();
diff --git a/xxx/inactive/mouse.c b/xxx/inactive/mouse.c
new file mode 100644
index 0000000..910f0cf
--- /dev/null
+++ b/xxx/inactive/mouse.c
@@ -0,0 +1,175 @@
+//http://forum.osdev.org/viewtopic.php?t=10247
+//based on Mouse.inc by SANiK
+//License: Use as you wish, except to cause damage
+
+#define FOOLOS_MODULE_NAME "mouse"
+
+#include "lib/logger/log.h"
+#include "lib/int/stdint.h"
+
+#include "x86.h"
+
+
+static volatile uint8_t mouse_cycle;
+static volatile uint8_t mouse_byte[3];
+volatile int16_t mouse_x;
+volatile int16_t mouse_y;
+static volatile uint8_t mouse_a;
+
+
+uint8_t mouse_read();
+
+void mouse_wait(uint8_t a_type) //unsigned char
+{
+ uint32_t _time_out=100000; //unsigned int
+ if(a_type==0)
+ {
+ while(_time_out--) //Data
+ {
+ if((x86_inb(0x64) & 1)==1)
+ {
+ return;
+ }
+ }
+ return;
+ }
+ else
+ {
+ while(_time_out--) //Signal
+ {
+ if((x86_inb(0x64) & 2)==0)
+ {
+ return;
+ }
+ }
+ return;
+ }
+}
+
+void mouse_write(uint8_t a_write)
+{
+ //Wait to be able to send a command
+ mouse_wait(1);
+ //Tell the mouse we are sending a command
+ x86_outb(0x64, 0xD4);
+ //Wait for the final part
+ mouse_wait(1);
+ //Finally write
+ x86_outb(0x60, a_write);
+}
+
+int8_t mouse_get_x()
+{
+ return mouse_x;
+}
+int8_t mouse_get_y()
+{
+ return mouse_y;
+}
+
+void mouse_init()
+{
+ mouse_x=mouse_y=0;
+ mouse_cycle=0;
+
+ uint8_t _status; //unsigned char
+
+ //Enable the auxiliary mouse device
+ mouse_wait(1);
+ x86_outb(0x64, 0xA8);
+
+ //Enable the interrupts
+ mouse_wait(1);
+ x86_outb(0x64, 0x20);
+ mouse_wait(0);
+ _status=(x86_inb(0x60) | 2);
+ mouse_wait(1);
+ x86_outb(0x64, 0x60);
+ mouse_wait(1);
+ x86_outb(0x60, _status);
+
+ //Tell the mouse to use default settings
+ mouse_write(0xF6);
+ mouse_read(); //Acknowledge
+
+ //Enable the mouse
+ mouse_write(0xF4);
+ mouse_read(); //Acknowledge
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Mouse Initialized");
+
+}
+
+void mouse_log()
+{
+ //log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"%02x / %02x / %02x ",mouse_byte[0], mouse_byte[1],mouse_byte[2]);
+
+ if(mouse_byte[0]&0x80||mouse_byte[0]&0x40)return; //skip packet on overflow
+ if(!(mouse_byte[0]&0x8))panic(FOOLOS_MODULE_NAME,"mouse packets out of sync!?"); // this bit is always 1, otherwise panic!
+
+
+ //
+ if(mouse_byte[1]>127){
+ mouse_x-=256;
+ mouse_x+=mouse_byte[1];
+ }
+ else
+ {
+ mouse_x+=mouse_byte[1];
+ }
+ if(mouse_byte[2]>127){
+ mouse_y-=256;
+ mouse_y+=mouse_byte[2];
+ }
+ else
+ {
+ mouse_y+=mouse_byte[2];
+ }
+
+
+
+
+ if(mouse_x<0)mouse_x=0;
+ if(mouse_y<0)mouse_y=0;
+ if(mouse_x>800)mouse_x=800;
+ if(mouse_y>600)mouse_y=600;
+
+
+ //log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"%d / %d / %02x ",mouse_x, mouse_y,mouse_byte[2]);
+ //PutFont('X', mouse_x,600-mouse_y, 0xffffff);
+
+}
+//Mouse functions
+void mouse_handler()//struct regs *a_r) //struct regs *a_r (not used but just there)
+{
+ X86_IRQ_BEGIN
+
+ switch(mouse_cycle)
+ {
+ case 0:
+ mouse_byte[0]=x86_inb(0x60);
+ mouse_cycle++;
+ break;
+ case 1:
+ mouse_byte[1]=x86_inb(0x60);
+ mouse_cycle++;
+ break;
+ case 2:
+ mouse_byte[2]=x86_inb(0x60);
+ mouse_cycle=0;
+ mouse_log();
+ break;
+
+ }
+
+
+ X86_IRQ_END
+}
+
+uint8_t mouse_read()
+{
+ //Get's response from mouse
+ mouse_wait(0);
+ return x86_inb(0x60);
+}
+
diff --git a/xxx/inactive/mp.c b/xxx/inactive/mp.c
new file mode 100644
index 0000000..1f6c2e6
--- /dev/null
+++ b/xxx/inactive/mp.c
@@ -0,0 +1,179 @@
+#define FOOLOS_MODULE_NAME "mp"
+
+#include "x86.h"
+#include "lib/logger/log.h" // logger facilities
+#include "lib/bool/bool.h"
+#include "lib/string/string.h"
+#include "smp.h"
+
+
+
+typedef struct mp_fps_struct
+{
+ uint32_t sig; //signature "_MP_"
+ uint32_t conf; //pointer to config struct
+ uint8_t length; //should be 1
+ uint8_t version; // 1=1.1, 4=1.4
+
+ uint8_t checksum;
+
+ uint8_t features1;
+ uint8_t features2;
+
+ uint8_t res1; //reserved
+ uint8_t res2;
+ uint8_t res3;
+
+}mp_fps;
+
+typedef struct mp_config_struct
+{
+ uint32_t sig; //signature "PCMP"
+ uint16_t length; //base table length
+ uint8_t version; //revision 1=1.1 4=1.4
+ uint8_t checksum;
+
+ uint32_t oemid1; //OEM id (ascii)
+ uint32_t oemid2;
+
+ uint32_t prodid1; //Product id (ascii)
+ uint32_t prodid2;
+ uint32_t prodid3;
+
+ uint32_t oem_table; //pointer (optional)
+ uint16_t oem_size; //size of this table
+ uint16_t entries; //entry count (following the header)
+ uint32_t local_apic; //local apic address (same for every cpu)
+ uint16_t length_ext; //extended table length (optional)
+ uint8_t check_ext; //checksum for ext. table
+
+}mp_config;
+
+
+
+typedef struct proc_struct
+{
+ uint8_t type; //0=processor
+ uint8_t apic_id;
+ uint8_t apic_ver;
+ uint8_t cpu_bits;
+ uint32_t cpu_sig;
+ uint32_t cpu_flags;
+
+}proc_entry;
+
+//entries are sorted. (otherwise ignore. bochs!)
+uint8_t *walk_mp_table(uint8_t *start_addr,smp_processors *smp)
+{
+
+ if(*start_addr==0x0||*start_addr==0x2)
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"entry type: %d",*start_addr);
+
+ // that is a processor
+ if(*start_addr==0x00)
+ {
+ proc_entry *pro=start_addr;
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"local apic id: %02X",pro->apic_id);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"cpu enabled bit: %s",pro->cpu_bits&1?"yes":"no");
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"bootstrap cpu bit: %s",pro->cpu_bits&2?"yes":"no");
+
+ // that is a enabled processor
+ if(pro->cpu_bits&1)
+ {
+ if(smp->processors>=SMP_MAX_PROC)
+ panic(FOOLOS_MODULE_NAME,"we do not support that many processors. recompile with higher SMP_MAX_PROC.");
+
+ smp->local_apic_id[smp->processors]=pro->apic_id;
+ // that is the bootstrap processor
+ if(pro->cpu_bits&2)smp->boot=smp->processors;
+ smp->processors++;
+
+ }
+
+ return start_addr+20;
+ }
+
+ return start_addr+8;
+}
+
+void do_mp_conf(mp_config *addr,smp_processors *procdata)
+{
+ char buf[]="XXXX";
+ uint32_t *buf_addr=buf;
+ *buf_addr=addr->sig;
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"mp_config table addr: %08X",addr);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"mp_config signature: %s",buf);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"mp_config version: %02X",addr->version);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"mp_config # of entries: %d",addr->entries);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"mp_config local apic addr: 0x%08X",addr->local_apic);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"mp_config tabel length: %d",addr->length);
+
+ uint8_t *start_addr=addr;
+ start_addr+=44;
+
+ procdata->processors=0;
+ procdata->local_apic_address=addr->local_apic;
+
+
+ for(int i=0;i<addr->entries;i++)
+ {
+ start_addr=walk_mp_table(start_addr,procdata);
+ }
+
+
+
+
+}
+bool do_mp_fps(mp_fps *addr,smp_processors *procdata)
+{
+
+ if(addr->length!=1)return false;
+ if(addr->version!=1&&addr->version!=4)return false;
+
+ char buf[]="XXXX";
+ uint32_t *buf_addr=buf;
+ *buf_addr=addr->sig;
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"signature: %s",buf);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"conf: %08X",addr->conf);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"ver: %02X",addr->version);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"f1: %02X",addr->features1);
+
+ if(addr->features1!=0)panic(FOOLOS_MODULE_NAME,"Intel default config not supported yet!");
+ do_mp_conf(addr->conf,procdata);
+
+ return true;
+}
+
+// todo: check checksum,version etc. and narrow down search
+bool mp_find(smp_processors *procdata)
+{
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Looking for Mp Floating Ponter Struct...");
+ uint8_t *addr=0x8000;
+ while(addr<=0xfffff)
+ {
+ if(strcmp("_MP_",addr,4))
+ {
+ // log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Found at 0x%04X",addr);
+ if(do_mp_fps(addr,procdata))return true;
+ }
+ addr++;
+ }
+
+ addr=0x190000-1025;
+ while(addr<=0x190000+1024)
+ {
+ if(strcmp("_MP_",addr,4))
+ {
+ // log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Found at 0x%04X",addr);
+ if(do_mp_fps(addr,procdata))return true;
+ }
+ addr++;
+ }
+
+ return false;
+
+}
+
diff --git a/xxx/inactive/mp.h b/xxx/inactive/mp.h
new file mode 100644
index 0000000..fc7f036
--- /dev/null
+++ b/xxx/inactive/mp.h
@@ -0,0 +1,2 @@
+#include "smp.h"
+bool mp_find(smp_processors *procdata);
diff --git a/xxx/inactive/pci.c b/xxx/inactive/pci.c
new file mode 100644
index 0000000..e5d9711
--- /dev/null
+++ b/xxx/inactive/pci.c
@@ -0,0 +1,133 @@
+#include "kernel.h"
+#include "x86.h"
+#include "e1000.h"
+#include "../lib/logger/log.h" // logger facilities
+#define FOOLOS_MODULE_NAME "pci"
+
+#define PCI_CONFIG_DATA 0xCFC
+#define PCI_CONFIG_ADDRESS 0xCF8
+
+ void pciConfigSet (uint8_t bus, uint8_t slot,
+ uint8_t func, uint8_t offset, uint32_t data)
+ {
+ uint32_t address;
+ uint32_t lbus = (uint32_t)bus;
+ uint32_t lslot = (uint32_t)slot;
+ uint32_t lfunc = (uint32_t)func;
+ uint16_t tmp = 0;
+
+ /* create configuration address as per Figure 1 */
+ address = (uint32_t)((lbus << 16) | (lslot << 11) |
+ (lfunc << 8) | (offset & 0xfc) | ((uint32_t)0x80000000));
+
+ /* write out the address */
+ x86_outl (0xCF8, address);
+ x86_outl (0xCFC,data);
+
+ }
+ uint16_t pciConfigReadWord (uint8_t bus, uint8_t slot,
+ uint8_t func, uint8_t offset)
+ {
+ uint32_t address;
+ uint32_t lbus = (uint32_t)bus;
+ uint32_t lslot = (uint32_t)slot;
+ uint32_t lfunc = (uint32_t)func;
+ uint16_t tmp = 0;
+
+ /* create configuration address as per Figure 1 */
+ address = (uint32_t)((lbus << 16) | (lslot << 11) |
+ (lfunc << 8) | (offset & 0xfc) | ((uint32_t)0x80000000));
+
+ /* write out the address */
+ x86_outl (0xCF8, address);
+ /* read in the data */
+ /* (offset & 2) * 8) = 0 will choose the first word of the 32 bits register */
+ tmp = (uint16_t)((x86_inl (0xCFC) >> ((offset & 2) * 8)) & 0xffff);
+ return (tmp);
+ }
+
+void test_bar(uint8_t bus, uint8_t slot, uint8_t offset)
+{
+
+ uint16_t bar_low=pciConfigReadWord(bus,slot,0,offset);
+ uint16_t bar_high=pciConfigReadWord(bus,slot,0,offset+2);
+
+ // check size
+ pciConfigSet(bus,slot,0,offset,0xffffffff);
+ uint16_t size_low=pciConfigReadWord(bus,slot,0,offset);
+ uint16_t size_high=pciConfigReadWord(bus,slot,0,offset+2);
+ uint32_t size=(size_high<<16)+size_low;
+ size=~size;
+ size++;
+ //
+
+ // restore original values
+ pciConfigSet(bus,slot,0,offset,(bar_high<<16)+bar_low);
+
+
+ log("e1000",FOOLOS_LOG_INFO,"%s bar: (0x%x 0x%x) size: 0x%x" ,bar_low&1?"i/o":"mem",bar_high, bar_low, size);
+
+}
+
+uint16_t pciCheck(uint8_t bus, uint8_t slot)
+{
+
+ uint16_t vendor, device;
+
+ /* try and read the first configuration register. Since there are no */
+ /* vendors that == 0xFFFF, it must be a non-existent device. */
+ if ((vendor = pciConfigReadWord(bus,slot,0,0)) != 0xFFFF)
+ {
+ device = pciConfigReadWord(bus,slot,0,2);
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"[%d,%d]: vendor: 0x%x / device: 0x%x",bus,slot,vendor,device);
+
+ // check for: E1000 (82540EM). PCI Ethernet Controller
+ if(vendor==0x8086&&device==0x100e)
+ {
+ // uint16_t irq=pciConfigReadWord(bus,slot,0,0x3C);
+ // uint16_t irq2=pciConfigReadWord(bus,slot,0,0x3E);
+ //
+ init_e1000();
+
+ test_bar(bus,slot,0x10);
+ test_bar(bus,slot,0x14);
+ test_bar(bus,slot,0x18);
+
+ // scr_put_hex(irq);
+ // scr_put_hex(irq2);
+ // scr_put_string_nl(";");
+
+
+ }
+
+
+
+
+ }
+
+ return (vendor);
+
+}
+
+void pci_init()
+{
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"scanning bus");
+ // todo: recurse on pci to pci bridges!
+ // todo: support multiple pci host controllers!
+ // (check more funcitons of device 0:0)
+
+ uint16_t bus;
+ uint8_t device;
+
+ for(bus = 0; bus < 256; bus++)
+ {
+ for(device = 0; device < 32; device++)
+ {
+
+ pciCheck(bus, device);
+
+ }
+
+ }
+
+}
diff --git a/xxx/inactive/smp.c b/xxx/inactive/smp.c
new file mode 100644
index 0000000..63b4087
--- /dev/null
+++ b/xxx/inactive/smp.c
@@ -0,0 +1,101 @@
+#define FOOLOS_MODULE_NAME "smp"
+
+#include "lib/logger/log.h"
+#include "lib/int/stdint.h"
+#include "smp.h"
+#include "mem.h"
+#include "spinlock.h"
+#include "x86.h"
+
+#define FOOLOS_APIC_SPUR_INT 0x00f0
+#define FOOLOS_APIC_INT_COMMAND_LOW 0x0300
+#define FOOLOS_APIC_INT_COMMAND_HIGH 0x0310
+
+// some multiprocessor shit that should move away TODO
+uint32_t c1,c2,c3;
+volatile uint8_t proc;
+uint32_t cpu_counter[SMP_MAX_PROC];
+
+void smp_main()
+{
+ /// TODO
+ /////// SYMMETRIC MULTIPROCESSING, APS get caought here, move it away ///
+ // catch the APs (Application Processors)
+// if(mp==1)
+ {
+ uint32_t ebp=pmmngr_alloc_block()+4095;
+
+ asm volatile("mov %0, %%ebp"::"r"(ebp));
+ asm volatile("mov %ebp, %esp");
+ asm volatile("jmp kernel_ap");
+ }
+
+ proc=c1=c2=c3=0;
+ for(int i=0;i<SMP_MAX_PROC;i++)cpu_counter[i]=0;
+}
+
+
+void kernel_ap()
+{
+ proc++;
+ uint8_t p=proc;
+ while(1)
+ {
+ cpu_counter[p]++;
+
+ lock_spin(0);
+ if(cpu_counter[p]%1000000==0)log(FOOLOS_MODULE_NAME,FOOLOS_LOG_DEBUG,"cpu[%d] %d",p,cpu_counter[p]);
+ lock_release(0);
+ }
+}
+void smp_log_procdata(smp_processors *procdata)
+{
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"---- smp -----");
+ for(int i=0;i<procdata->processors;i++)
+ {
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"cpu %d, apic_id: 0x%X, bps: %s, apic_addr:0x%08X",i,procdata->local_apic_id[i],i==procdata->boot?"yes":"no",procdata->local_apic_address);
+ }
+
+}
+
+// this will start all our application processors!
+void smp_start_aps(smp_processors *pros,uint8_t *start_sel)
+{
+
+ //lets copy the code to the bootsector !
+
+ uint8_t *dest=0x7000;
+ for(int i=0;i<0x100;i++)
+ {
+ dest[i]=start_sel[i];
+
+ }
+
+ //bsp (boot processor) enables its local apic
+ uint32_t *reg=pros->local_apic_address+FOOLOS_APIC_SPUR_INT;
+ *reg=0xffffffff; // all bits 1 and interrupt 255
+
+ for(int i=0;i<pros->processors;i++)
+ {
+ if(pros->boot==i)continue;
+
+ log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"starting cpu %d",i);
+
+ uint8_t dest=pros->local_apic_id[i];
+
+ reg=pros->local_apic_address+FOOLOS_APIC_INT_COMMAND_HIGH;
+ *reg=dest<<24; // destination apic.
+
+ reg=pros->local_apic_address+FOOLOS_APIC_INT_COMMAND_LOW;
+ *reg=(5<<8)|(1<<14); // 101 INIT
+
+ // do we really neet this?
+ // todo: use some real sleep (not implemented yet :( )
+ sleep(30);
+
+ // start proc 0x7 = 0x7000; etc..
+ *reg=(6<<8)|(1<<14)|0x7; // 110 SIPI
+ }
+}
+
+
diff --git a/xxx/inactive/smp.h b/xxx/inactive/smp.h
new file mode 100644
index 0000000..8737ffc
--- /dev/null
+++ b/xxx/inactive/smp.h
@@ -0,0 +1,20 @@
+#ifndef SMP_H
+#define SMP_H
+
+#define SMP_MAX_PROC 32
+
+typedef struct
+{
+
+ uint8_t boot; //which processor in array is bsp
+ // (boot strap processor)
+
+ uint8_t processors; // total number of usable processors
+
+ uint32_t local_apic_address;// same for every processor
+
+ uint32_t local_apic_id[SMP_MAX_PROC]; // unique for every processor
+
+}smp_processors;
+
+#endif