summaryrefslogtreecommitdiff
path: root/kernel/timer.c
blob: 5adc98669197924669bc4dd615ea6b4d47b6d566 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
/// PIT /// Timer stuff

/*
 http://www.brokenthorn.com/Resources/OSDevPit.html

 vcc/gnd - voltage/ground

 D0-D7 - data lines		(data bus)
 wr/rd - writing / reading	(system control bus) 
 cs - ignore wr/rd or not	(address bus)
 a0-a1				(address bus)

 // the three 16bit down counters/timers/channels
 clk	0-2 (in)
 gate	0-2 (in)
 out	0-2 (out)

 //typical
    out1 -> pic  interrupt on every tick (system timer)
    out2 - was used for genearting dram memory refresh  (Do not use)
    out3 -> pc speaker

    gate pins : depend on mode of operation
    we do have modes 0-5.
    mode0: counts down to zero , triggers interrupt and waits 
    mode1: 
    mode2: rate generator (sys timer)
    ....


 */

#define FOOLOS_MODULE_NAME "timer"

#include "timer.h"

#include "lib/logger/log.h"	// logger facilities

static volatile uint64_t task_system_clock=0;

void timer_init()
{
    // config out timer on channel 0 : mode 2 (sys timer)
    // http://en.wikipedia.org/wiki/Intel_8253#Control_Word_Register
    // http://www.brokenthorn.com/Resources/OSDevPit.html
    // int0 will be triggered ~25 times a second.
    
    __asm__("pusha");

    __asm__("mov %0, %%dx"::"X" (1193180 / 25));

    __asm__("mov $0b00110100, %al");
    __asm__("out %al,$0x43");

    __asm__("mov %dx,%ax");

    __asm__("out %al, $0x40");
    __asm__("xchg %ah,%al");
    __asm__("out %al, $0x40");

    __asm__("popa");

    log(FOOLOS_MODULE_NAME,FOOLOS_LOG_INFO,"Configured PIT Channel 0 : Mode 2 : 1/25 s.");

}

void timer_tick()
{
    task_system_clock++;
}

uint64_t timer_get_ticks()
{
    return task_system_clock;
}